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DAC161S997EVM: about sine wave amplitude of HART signal

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Part Number: DAC161S997EVM

I have 2 questions about inputting HART signal to DAC161S997.

1. When HART modem output FSK amplitude at 700mVp-p to DAC161S997,
   the output of DAC161S997-9pin(OUT) drops to 70mVp-p
   and it monitors 300mVp-p at a point of the 250Ω Resistor.
   According to HART specification, it is written that FSK amplitude needs more than 400mVp-p.  
   Is it possible to gain FSK amplitude at 9pin(OUT) ?

2. When DACout is 5mA, sine wave is output correctly.
   But when DACout is 4mA, it looks like one side of sine wave is not good.
   Do you have any solutions for outputting normal sine wave at 4mA ?

Please see the attached PDF for detail.

(Please visit the site to view this file)


TX7316EVM: schematic and PCB layout files of TX7316EVM

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Part Number: TX7316EVM

Hi team,

Because there is no schematic and PCB layout files of TX7316EVM found on ti.com.Can you share schematic and PCB layout files of TX7316EVM, which can be used to customer PCB design directly(such as, open it by Altium Designer)? 

Thanks and best regards,

Sophia Yao

AFE5818EVM: schematic and PCB layout files of AFE5818EVM

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Part Number: AFE5818EVM

Hi team,

Because there is no schematic and PCB layout files of AFE5818EVM found on ti.com.Can you share schematic and PCB layout files of AFE5818EVM, which can be used to customer PCB design directly(such as, open it by Altium Designer)? 

Thanks and best regards,

Sophia Yao

ADS1298: Noise or data corruptions takes place when connected to patient.

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Part Number: ADS1298

Designed a board for 12 lead ECG.

1. With simulator input, the ecg waves in our software Simul-G seems okay.

But when connected to patient, just noise appears .. especially on V1..V6.

2. ECG output is okay when patient simulator is battery powered. 

With adapter power noise appears on ECG.

Schematic design is as per evaluation board circuit.

ADS5562: CLKout in SLOW SPEED MODE

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Part Number: ADS5562

Hello,

I have a question about ADS5562.

<Customer Use Case>
- Sampling frequency: 12.5MHz
- LOW SPEED mode (Tying the SCLK pin to high)
- CMOS mode

[Q1]
Their CLKOUT (5pin) duty cycle is not 50%.
Their measurement result is about 78%.
Why is this?
Are there any possible causes for the above?

- D/S, p15, 6.11 Timing Characteristics for LVDS and CMOS Modes
  PARALLEL CMOS MODE: CMOS output clock duty cycle= 50%

<My thoughts>
The measurement conditions for the following data are Default Speed ​​Mode.
I think that it may not apply when used in Low Speed ​​Mode.

The important thing about CLKout is not the duty cycle but the rising edge.
Therefore, I don't think I need to worry about the Duty Cycle not being 50%.

[Q2]
I asked them to investigate the waveforms to see if they met the following conditions:
- D/S, p16, 6.14 Timing Characteristics at Lower Sampling Frequencies
- D/S, p18, Figure 5. CMOS Mode Timing

As a result,
tPDI = about 70ns.
tsu = about 25ns
th = about 55ns
This result does not seem to meet the requirements.

Why is this?
Are there any possible causes for the above?

Also, I think that even if the Output Clock Position is adjusted using the SEN Control Pin, the request cannot be satisfied.
What should I do?

Best Regards, 
Kaede Kudo

MSC1213Y5: Max thermal profile peak temp

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Part Number: MSC1213Y5

What is the maximum oven peak temp for this components.  We are replacing a lot of these components because they are failing at test.  Please advise.

ADS131A04: Input Bandwidth vs. Fdata needed

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Part Number: ADS131A04

Can you provide an Input Bandwidth vs. Data Rate specification table for the ADS131A04. 

The FMOD for my application will be 1.024Mhz.

Thanks.

ADS1299: Data conversation modes

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Part Number: ADS1299

Hi.

I am looking ways to synchronize data conversation from 3 ADS1299 on application level and there are some question about this.

I found that single-shot mode is very useful in this task, but reading documentation remain many question about it:

( ADS1299-x Low-Noise, 4-, 6-, 8-Channel, 24-Bit, Analog-to-Digital ; SBAS499C –JULY 2012–REVISED JANUARY 2017 )

1). In «9.4.5 Continuous Conversion Mode» documentation shows :

" When switching from Single-Shot mode to Continuous Conversion mode, bring the START signal low and back high or send a STOP command followed by a START command. This conversion mode is ideal for applications that require a fixed continuous stream of conversions results."

ok, let's read «9.4.6 Single-Shot Mode» about Single-shot mode:

"When switching from Continuous Conversion mode to Single-Shot mode, bring the START signal low and back high or send a STOP command followed by a START command. This conversion mode is ideal for applications that require non-standard or non-continuous data rates."

2). There are two modes:

«Read Data Continuous mode» - when data automatically shift to output registers before DRDY pulls low ("Tupdate")

«Read data by command» - when data shift to output register after RDATA command received ("The RDATA command loads the output shift register with the latest data when not in Read Data Continuous

mode." - dataheet)

And in both modes "To retrieve data from the device after the RDATAC/RDATA command is issued,make sure either the START pin is high or the START command is issued.".

---------------------------------------------------------------------------------------------------------------------------------------

What will actually happen if I bring the START signal low and back high - I will switch to continious mode after trying restart conversation(single-shot mode) or device itslelf will switch from continious to single-shot mode no matter what writen if CONFIG4 (continious mode)? What influence of CONFIG4 single-shot bit if device switch modes itself after start/stop commands ?

Can I read completed conversation data in single-shot mode after restarting new one ? Is I really need START pin high to receive last data if data already loaded in output register (RDATAC) and DRDY was pulled low ?


VSP1000: is there is any simulation available for vsp1000

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Part Number: VSP1000

Hi is there is any simulation available for vsp1000 either in tina,ibis model or hspice.

VSP5610: simulation tool for vsp5610

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Part Number: VSP5610

is there is simulation available for vsp5610 either in tina or hspice.

TLV2556-EP: Junction to Ambient Thermal Resistance

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Part Number: TLV2556-EP

Hi E2E,

Good day.

What is the Junction to Ambient Thermal Resistance of the TLV2556MPWREP?

Thank you.

Regards,
Carlo

Attachment test

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JPEG

PNG

DOCX

(Please visit the site to view this file)

AFE4403: Can RX_ANA_SUP and RX_DIG_SUP be supplied with different voltages?

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Part Number: AFE4403

Hello,

The AFE4403 datasheet mentions "be “The two receive supplies could be shorted to a single supply on the board." Do they have to be? Can my customer run them at different voltages?  For example 2.5V for the RX_ANA_SUP and 3.3V for the RX_DIG_SUP  (since the micro is running at 3.3V, and therefore they wouldn’t need level translation).

Thanks,

John

ADC12DJ3200: IBIS Models Functionality Question

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Part Number: ADC12DJ3200

Hi team, 

Quick question regarding IBIS Model Functionality. What type of modeling does an IBIS model allow, is it just for modeling input/output parameters (ex: signal integrity) or can you use it for more involved ADC parameters such as SNR, SFDR, DDCs, etc?

Thanks,

Arthur

DAC7513: Does TI offer DAC solution similar to DAC7513 but WITHOUT SYNC function?

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Part Number: DAC7513

Hi~

I'm looking for DAC solution similar to LTC2629 and I found TI's DAC7513 has similar features which could fit my design.

However, I don't need SYNC function so I'm wondering if TI offers solution similar to DAC7513 but without SYNC function?


DAC39J84: JTAG on a custom board with TI eye scan software

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Part Number: DAC39J84

Hi,

I am trying to run an eye scan on a custom board with dac39j84 with TI eye scan software. 
I am using this : https://www.ftdichip.com/Products/Cables/USBMPSSE.htm JTAG-USB.

TI eye scan software will not recognise the USB cable (error 2) when it is connected to the DAC.

Is there a way to use TI eye scan software to perform an eye scan on the custom board (without cpld and ftdi chip on it) with C232HM-DDHSL-0 cable directly connected to the JTAG pins.

Also, when I run an eye scan on the DAC39j84 eval board, I noticed that the JTAG cable (https://www.ftdichip.com/Products/Cables/USBMPSSE.htm) doesn't do anything and the data is read with the USB cable, connected to the on-board CPLD and on-board FTDI. Is it correct?

Cheers,
Anton

ADS1281: Is ADS1281 fittable for a signal with 0.1Hz ~2Hz?

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Part Number: ADS1281

HI TIer,

      I would like to samle a signal with 0.1Hz~2Hz bandwith. At first I thought ADS1281/2 is the one I need. However, th Figure 21 in ADS1281 datasheet confused me. Does it mean ADS1281 is not a good one for this case?

DAC38RF85: DAC38RF85 EVM

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Part Number: DAC38RF85

Dear TI Data Converter team,

I would like to try DAC38RF85. Does TI offer an EVM for this specific part number? I have found several other EVMs: 

  • DAC38RF80EVM
  • DAC38RF82EVM
  • DAC38RF86EVM
  • DAC38RF87EVM
  • DAC38RF89EVM

Which one of these should I get in order to evaluate the performance as close to DAC38RF85 as possible?

ADS5294: ADS5294

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Part Number: ADS5294

I wish to use this part with a burst sample clock. Two questions.

1) Are there any issues with the timing for the first few samples.

2) Do extra clocks have to be supplied to flush the pipeline at the end of the burst or will it flush automatically.

The sample clock will be bursts of 20MHz ranging from a few hundred clocks up to 17k clock at rates of a few Hertz to a few hundred Hertz.

Many Thanks.

Alan

ADS1261-Q1: Pseudo-Code for ADS126x single ended measurements

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Part Number: ADS1261-Q1

Hi everybody,

I'm about to implement ADS1260-Q1 and ADS1261-Q1 ADC's  and reading the datasheet.

Until set the parameters of analog inputs it is clear how to use those ADC's.

In my specific scenario I have signal voltage range between 0,25 V and 3 V to GND (AVSS).

So I need to use default reference settings (AVDD - AVSS).  AVDD is 5V.

What is the best way to set INPMUX Register to get good resolution?

Is my assumption: GAIN x (MUXP(voltage) - MUXN(voltage)) = digital value after conversation right?

So.. it make more sense to set one of the inputs (P / N) to AINCOM and other (AINx) to the signal?

 

Thanks in advance

 

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