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ADS1292ECG-FE: ADS1292ECG-FE

December 28, 2018, 8:30 am
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Part Number:ADS1292ECG-FE

I would also like to have the PC source Code to this application, there is an algorithm you are using to convert the values to ECG/Respiratory voltages, I will need this. Please email me the code

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DAC38RF82: DAC38RF82

December 28, 2018, 8:56 am
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Part Number:DAC38RF82

Dea members, I have a question regarding the clock out signal available on the DAC38RF82. 

Please see the diagram here, and then here is my question,

I want to see how can I get an access to the DAC

Clock signal at ~ 9GHz to use elsewhere for the TX and RX chain.

Is there any way to avoid the /3 minimum on the DAC clock out ?.

I still need to run the ADC at ~3GSPS, and I need the DAC to run at

~9Ghz, What other possible arrangement can I do to obtain this ?



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DAC80508: DAC80508 Default value for REFDIV-EN

December 28, 2018, 10:06 am
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Part Number:DAC80508

What is the default (reset) value for REFDIV-EN (the reference divider).  On page 34, Table 13, it is listed as 0/1.  Is it 0 for the Z devices and 1 for the M devices?

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DAC80508: How to connect external reference

December 28, 2018, 12:05 pm
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Part Number:DAC80508

The internal reference is enabled by default at power up.  If I connect an external reference how do I avoid contention since both the internal and the external reference will be ON until I disable the internal one?

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ADS1259: adjust reference voltage to input range

December 28, 2018, 1:24 pm
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Part Number:ADS1259

I need to digitize differential signal +-3.6 V. to get better precision VREF have to be close to 3.6 V. My reference have 2.50 V. What the best way to do this? Use operational amplifier to gain my reference voltage, use operational amplifier to suppress my signal or use reference with bigger voltage source and then suppress it?
And second question. can i use one power supply and reference voltage source to many (3-6) ADC ?

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DAC8562: DAC8562SQDGSRQ1 katchup

December 28, 2018, 8:37 pm
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how much sample rate and bandwidth do i need for this waveform?

December 29, 2018, 10:12 pm
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Hi Everybody,

please consider the bellow waveform:

there is two of the above signal which should to be sampled simultaneously.

i am selecting an ADC converter.

i need to know the bellow characteristics:

1) Bandwidth

2) Sample rate

3) type of interface ( to MCU )

Best Regards

Ras

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ADS8588H: Need OPAMP BUFFER for ADS8588H

December 30, 2018, 12:10 am
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Part Number:ADS8588H

Hi TI experts,

I am looking for a suitable OPAMP buffer for ADS8588H with input voltage range +/- 10V.

For other details & requirements about ADS8588H,pls refer the following thread which i already posted.

https://e2e.ti.com/support/data-converters/f/73/p/725867/2691426?tisearch=e2e-sitesearch&keymatch=ADS8588H#2691426

I understand from the following link for selection guidelines of OPAMP buffer for ADC.

https://www.changpuak.ch/electronics/Choosing_OPAMP_to_drive_ADC.php

Pls suggest a suitable OPAMP buffer with higher CMRR,higher bandwidth & +/-10V operating range.

I have located some options like OPA365,OPA836,TLO84 etc.

But none of above are satisfying my requirements to meet +/-10 V input range.

Kindly held me to locate right OPAMP BUFFER for the selected ADC - ADS8588H.

regards,

Ramesh P

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AFE5809: Question on Differential termination resistor location for ADC clocks input

December 30, 2018, 12:55 am
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Part Number:AFE5809

Hi there,

We are designing LVDS or LVPECL AC coupling interfaces for AFE5809 ADC clocks and CWx16 clocks. 50MHZ for ADC.

Question:

1. What's the differential input resistance of clock pin pairs of AFE5809? Seems no detail data in datasheet.

2. I assume it is High impedance for Question 1. Both LVDS and LVPECL require a 100ohm differential termination between CLK_P and CLK_N.

However, we are not sure the relative loaction of AC coupling capacitors and 100ohm resistor. From Datashet Figure107, resitor are placed before AC caps, that is "Clock source--> 100ohm --> AC caps---> AFE". But I also see some deisgn as "Clock source--> AC caps--->100ohm --> AFE" .

Which one is correct? And Why?

3. Should we place 100ohm+AC caps close to Clock source IC or AFE? And Why?

Thanks, and Happy New Year!

100hm -->

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AFE5816EVM: AFE5816EVM with TSW1405

December 30, 2018, 2:10 am
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Part Number:AFE5816EVM

Hello,

I am using the AFE5816EVM with the data card TSW1405 and found that there is no INI file available for this combination.

I have tried the ini file from the 5808 (found in the forum here), there I got some communication, but not the expected waveforms.

Is it possible to provide the INI file?

Thank you and a happy new year...

Mark

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Recommendation for 24 bit ADC

December 30, 2018, 6:40 am
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Hi,

I would like to ask recommendations for ADC with following capability:

- Input Frequency Response 0.01Hz - 100Hz or above with almost no attenuation

- 24 bit data output or above

- at least 50 SPS or above

- I wouldn't mind multiple analog inputs as long as simultaneous sampling

- Can measure Analog voltage of at least 0 - 5V

- PGA of 1, 2, 32, and 64 or above.

Thanks 

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AMC7834: CLAMP Configuration (0x17) R/W problem

December 31, 2018, 2:58 am
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Part Number:AMC7834

Should all of the bits 0..6 in CLAMP Configuration (0x17) be readable to indicate their status?  I find that Bit 6 (PAON) does change to reflect its status, but the lower Bits 0..5 do not. I can successfully write to Bits 0..5 to toggle them and clamping/unclamping has the desired effect on the DACs, but reading the bits always returns TRUE (1) whether they are clamped or not.  Is this expected behavior, or perhaps I am missing something?

Thank you -

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ADS1281: Wake up flag

December 31, 2018, 7:23 am
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Part Number:ADS1281

we are experiencing a problem during our start up process.

We are unsure whether this comes from the ADS1281 wakeup sequence or the CPU startup sequence.

 

Does the device have a "ready" flag to indicate it has completed startup and is ready to begin communication?

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ADS1261EVM: The Register Map did not show and the Delta -Sigma did not work! It show the message "unable to connect locate main application"

December 31, 2018, 5:44 pm
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AFE5808: Questions for AFE5808A Example Registers Configuration Along with TIDA-01351

January 1, 2019, 5:27 pm
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Part Number:AFE5808

Hi Experts,

Our customer is using AFE5808A as the altrasonic AFE circuit referring to TIDA-01351 CW circuits, and they want to know if we have any example registers configurations for this circuit? Also any example registers configuration for ADS8900B in CW circuits? Do we have any recommendations for the 1x and 16x clock frequency for AFE5808A?

Thanks a lot!

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TINA/Spice/ONET-10G-EVM: ONET-10G-EVM

January 2, 2019, 12:20 am
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ADS1259-Q1: Safety Analysis - FIT rates acc. SN29500

January 2, 2019, 12:26 am
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Part Number:ADS1259-Q1

Dear TI team,

 

this thread is basically a copy of my previous thread 'ADS1259-Q1: Safety Analysis (Reliability data)', that I have closed.

 

Would it be possible to provide me the FIT rates acc. SN29500 for ADS1259-Q1? You can contact me via email.

Thank you very much.

Kind regards

Michael

 

 

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ADS1292ECG-FE: ADS1292ECG-FE Labview PC software source file

January 2, 2019, 5:11 am
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Part Number:ADS1292ECG-FE

Hi All, I am using ADS1292ECG-FE devkit for a project. The ECG waveform could be shown in the Labview PC software. However, I can't find the Labview PC software source code. I really need those .vi source files. Would anyone send these files into my registered email: ruhua@sun-science.com Really appreciate!
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ADS1284: Current status

January 2, 2019, 6:26 am
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Part Number:ADS1284

Hi team,

Customer wants to use ADS1284 in their project, but I find there is no detailed price and sample in web. Could you help check the current status and schedule of ADS1284? 

Thanks and Best Regards,

Will

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ADS1217: DRDYn signal is always "clocking" (high = 20us, low = 30ms)

January 2, 2019, 8:03 am
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Part Number:ADS1217

Everything seems to be working ok,

but I dont know why the DRDYn pin is always driving this signal even after power up!!!

Below pin status: (I am not issuing any commands to ADC)

CSn = high

SCLK = low

CLK = 8MHZ

DIN =  low

DSYNC = high

DOUT = low

POL = low

RESETn = High

DRDY = "clocking" (high = 20us, low = 30ms)

Register settings:

REG0 = 0x0C = fosc/128 + Int Vref enable + Int Vref = 2.5V + Buffer disable + MSb transmitted first

REG 9 = 0x47 = Unipolar + Auto setting mode + Decimation default D10 to D8 = 7

Any suggestions?

Thank you

Fausto Bartra

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