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SM73201-ARC-EV: issue of RS232 and example project

June 1, 2019, 1:32 am
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Part Number:SM73201-ARC-EV

I have 2  issues for my using of SM73201_ARC-EV.
First,  6V(7.1V  by measured) DC power supply positive to +6V pin of J8 (J8p1) and negative to GND pin of J8 (J8p2). RS232 interface for TX，RX and GND is connected to J14 and baud
is set to 115200,8 Data Bits, No Parity, 1 Stop Bit. Power on the board, GREEN LED is on, YELLOW LED is blinking. The messy code is displayed on serial tool. when i enter help and send it, recieve the messy code as well.  Is there something error for my using this board?
Second, if i  modify the example project and generate the bin file. How to load the bin file into board? Furthermore, in the example project, error of 28033_64Pin_Arc_Detection.out" not errors encountered during linking; "28033_64Pin_Arc_Detection.out" not Arc_Detection during compiling. How i address it?
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Recommended DAC

June 1, 2019, 2:51 am
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Please recommend a DAC:

The input is a PWM signal and the output is a 0.2V-1.2V analog voltage signal.

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TSW1405EVM： afe5809

June 1, 2019, 3:18 am
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Part Number:TSW1405EVM

Hello,

when I evaluated afe5809evm using tsw1405evm, I found that only ‘1W_SERIAL.SVF’ is available in the firmware. Now I want to develop a new firmware for myself to use. Who can provide relevant  source code? Thank you!

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24 bit ADC with integrated FIFO interfacing with ELB-REV4

June 1, 2019, 5:35 am
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Hello experts

  • I am looking for a ADC chip set with 16 bit or 24 bit resolution
  • with on chip capture buffer/FIFO of 1024 samples and it must have a interrupt line
  • this interrupt line which only interrupt the ELB-REV4 (AM335X based device) once capture buffer is half filled 512 samples and
  • then  ELB-REV4 (AM335X based device) can read data from the ADC using SPI or any interface
  • power consumed by this ADC must be as low as of the order of 2mW even if power consumed is bit high its ok sampling rate can vary from 10 SPS to 1000 SPS

Please suggest any ADC chipset that satisfies the above points

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ADS1299: ADS1299 data rate

June 1, 2019, 7:58 pm
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Part Number:ADS1299

Hello,

Can you let me know if the data rate for ADS1299 in the datasheet (250SPS to 16kSPS) is the data rate per ADC channel or total data rate for all channels?

Thank you!

Wenhao

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ADS114S08: GPIO outputs in power down mode

June 2, 2019, 12:14 am
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Part Number:ADS114S08

Hello,

I consider using  the ADS114S08 for a low power device. Therefore I will use the Power down mode.

I would like to know if the GPIO outputs are maintained when the ADS is in Power down mode.

Kind regards.

Frederic

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ADS131E08: Looking for sample code

June 1, 2019, 11:34 pm
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ADS54J40: ADS54J40 Firmware

June 2, 2019, 6:45 am
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Part Number:ADS54J40

hi

I purchased a new analog to digital converter carte ADS54j40 I want to spin it in FPGA Kintex7, so I'm looking for the firmware of ADS54J40 to work with FPGA and process the output data of ADS54J40 in FPGA carte

thank you

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ADS1293: Ads1293 Configuration

June 2, 2019, 11:18 am
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Part Number:ADS1293

Hello TI,

I have have searched extensively through data sheets to find how I may daisy chain configure the ads1293.

Is this possible with the ads1293?

Thank you

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DAC7724: Question about output side information

June 2, 2019, 6:52 pm
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Part Number:DAC7724

Please let me know about two points below for DAC7724's output side;

①Internal equivalent circuit for DAC output side, and these resistor/capacitor value.

②Is DAC7724 have output current limiter? (or protector?)

Best regards,

Satoshi

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ADS7057EVM-PDK: 49.9 ohm on ADS7057EVM-PDK

June 2, 2019, 7:18 pm
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Part Number:ADS7057EVM-PDK

Hello, 

I have a problem about ADS7057EVM-PDK.

On the schematic about ADS7057 there have a 49.9 ohm connected between PHI board and SDO pin. 

What are the 49.9 ohm use for ?

1. This 49.9 ohm is used to impedance match between high speed signal transfer

2. For CMOS output to avoid large charging transient current cause digital ground bounce 

Thank you for your help.

BR 

Wen   

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DAC5682Z: The output voltage decreases with the increase of frequency.

June 2, 2019, 7:24 pm
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Part Number:DAC5682Z

Hi all

       I connect DAC5682Z and FPGA through Parallel LVDS，Now I can  output sinusoidal waveforms. When the Sin wave frequency was 4MHz， the Voltage value was 1.98V. When the Sin wave frequency was 250MHz， the Voltage value was  only 500mV.Please tell me the reason，Is this normal?

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TX517: Asking for TX517 TINA Simulation Model

June 2, 2019, 8:00 pm
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Part Number:TX517

Hi Experts,

Our customer wants to have the TX517 TINA simulation models, but we can not find it on our website, can you help to share with us?

Thanks a lot!

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ADS1278: ADS1278 Frame sync time issue

June 2, 2019, 9:38 pm
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Part Number:ADS1278

Dear TI Team,

When using a delta-sigma ADC, multiple ICs can be used to synchronize the SYNC signal

This method requires a time of Tndr after the sync signal is generated and causes a loss to the system.

Is there a way to synchronize the sampling between delta-sigma ADCs without a time delay like the SAR conversion start signal?

And I would like to ask if there is any reference material on the algorithm that performs high-speed sampling to obtain maximum simultaneous timing data.

Thanks.

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ADS54J42: NYQUIST ZONE & CTRL NYQUIST Register setting

June 3, 2019, 12:08 am
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Part Number:ADS54J42

Hello,

My customer has a question about ADS54J42.

[Q1]

Please tell me the proper setting for NYQUIST ZONE and CTRL NYQUIST.

<Their configuration>

* Input Frequency Range = 75MHz to 475MHz (this is narrow band signal) 

* Sampling Rate = 500MSPS

<My understanding>

* CTRL NYQUIST is always 1.

* Input Frequency < 250MHz, then NYQUIST ZONE = 000

* 250MHz <= Input Frequency < 500MHz, then NYQUIST ZONE = 001

Is my understanding correct ?

[Q2]

There is no such setting in AFE54Jxx GUI.

Is this setting required ?

[Q3]

What does this change?

I understand ADS54J42 is 4 interleaving ADC.

Therefore it will produce interleaving spurs. (DC, fs/4, fs/2 at no input, fs/4 +/- input frequency, fs/2 - input frequency at signal input)

Best Regards,

Hiroshi Katsunaga

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ADS1298: ADS1298 Package description.

June 3, 2019, 12:33 am
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Part Number:ADS1298

Hi, 
The first page of the ADS1298R datasheet enlists that ADS1298 and ADS1298R are available in two packages: A BGA package and TQFP package. 
However, I am unable to find the ADS1298R on the TI website or anywhere else in a TQFP package. I wanted to know if this chip is available in the TQFP package or if it is only its predecessor; the ADS1298 that is available in that package. 

Thanks

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DAC101C081: Qualification Summary Report For DAC101C081CIMK/NOPB

June 3, 2019, 1:28 am
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Part Number:DAC101C081

Hi,

I cannot find qualification summary report (or reliability test report) for DAC101C081CIMK/NOPB in TI site link.

I need this document for my end customer document approval.

Can you share the document with me?

Best Regards,

Philip

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ADS5560: Why is the output only half?

June 3, 2019, 1:32 am
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Part Number:ADS5560

I use serial interface mode. 

If input voltage 0V then output is 0x7FFF

Why output is not 0x0000.

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ADS1298R: ads1298R

June 3, 2019, 1:45 am
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Part Number:ADS1298R

the ads1298r has built in onchip filters.  kindly confirm if these filters can  remove noise filters while acquiring the ecg signals.  or do we have to develop filters for removing noise. 

kindly advice

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AFE5809: The Priority of C-bypass capacitance and Register 59[3:2] when decide LNA High Pass Corner Frequency

June 3, 2019, 2:04 am
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Part Number:AFE5809

Hi

we use AFE5809, and have this question about "LNA High Pass Frequency" based on the original thread. 

As Datasheet mentioned, LNA High Pass corner Frequency can be determined by two methods:

method 1 : page 33, C_bypass decide the corner freq, 15nF --> 100KHZ, and 47nf-->33KHZ

method 2: page 84, table 27, the register Reg59[3:2] can also set corner freq to  4  different values when Cbypass is fixed = 15nF

My Question : 

Which method has higher priority ?   I guess the C_bypass does. and my understanding is :

Table27 ONLY apply to the situation when C_bypass=15nF.  If C_bypass use other capacitance values (like 47nf), the bits written into Reg59[3:2] will be ignored by AFE. 

Am I correct? Thanks very much.

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