Part Number:DAC38RF82
Hello Team,
may I kindly ask you where to find the highlighted, referenced chapters, please? I cannot find them in the JEDEC JESD204C standard.
Thanks and Best Regards, Hans
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DAC38RF82: SYNC Interface
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ADC
hello,
while i am working on PGA970 EVM i got ADC amplitude voltage is approx 3.012V on LVDT. As provided in data sheet as well as we discussed, range of ADC is 0V - 2.5V then how its possible the output of ADC will come upto 3V.
kindly know above.
Thanking you.
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DAC38RF85: Loopback
Part Number:DAC38RF85
Section 8.3.1 of the datasheet ( bottom of page 39 ) references a LOOPBACK setting in SRDS_CFG1 register.
The section (8.5.86) describing the SRDS_CFG1 register has no LOOPBACK setting.
What is the loopback function and how can we control it ?
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VSP5610: Not able to get proper output
Part Number:VSP5610
Hi,
I configure AFE IN CMOS MODE .
In sh mode 4 channel analog input in 8 bit mode
.
Clamp mode select-NON CLAMP AND SHREF_EN=ON
INTERNAL REFERENCE 2V SELECT.
I HAVE CONFIGURE 8Mhz to AFE.And external input apply 1v p-p and 1Mhz Frequency.
In AFE Cap placed at ain pin.and gnd pin are grounded through cap.I have attached the image.
I am able to capture when i configure SHP_A RISING-0 COUNT,SHP_A FALLING -0 COUNT,SHD_A RISING-0 COUNT,SHD_A FALLING-0 COUNT
And SHP_B RISING-0 COUNT,SHP_B FALLING-7 COUNT,SHD_B RISING- 8 COUNT AND SHD_B FALLING- 14 COUNT. And i apply external analog signal on ch-3 and ch04 of Afe then i could capture.
But when i kept same SHP_A=SHP_B AND SHD_A=SHD_B.THEN I COULD NOT CAPTURE AS I WANT.
I HAVE ALSO TRY SHP_A AND SHP_B OF DIFFERENT VALUE AND SHD_A AND SHD_B OF DIFFERENT VALUE.
I HAVE CALCULATE COUNT ACCORDING TO DATASHEET.
DOES SHD_A and SHD_B SHOULD BE DIFFERENT IF SO THEN HOW MUCH?
DOES SHP_A and SHP_B SHOULD BE DIFFERENT IF SO THEN HOW MUCH?
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ADS1278EVM-PDK: Configuration with Raspbery Pi
Part Number:ADS1278EVM-PDK
Hello,
I have purchased ADS1278EVM-PDK to interface it with Raspberry Pi. Is it possible to have an example code to interface it with Raspberry Pi3 Model B+. I would also like to know if it is also possible to use ICS-40300 MEMS microphone with the ADC with/without amplifier circuit.
Your response will be highly appreciated.
Best Regards
Shakeel
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ADS8331: Analog input BW
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ADS1294: What is the AC input impedance
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ADS52J90: Length Matching JESD Outputs
Part Number:ADS52J90
This is a follow up question regarding the length matching of the JESD CML signals between the ADC and FPGA. This was not really answered in the previous post and I would like some clarification.
JESD204B does not require length matching between the differential lanes. This is one benefit of the protocol.
Is this not the case for ADS52J90? Does it require the lanes to be length matched?
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ADS8353: SPI clock period and sample rate
Part Number: ADS8353
The datasheet appears to have conflicting information - it states that the ADS8353 is capable of 16 bits at 600ksps, and that it has a throughput time of 16.6us which is consistent. But in the SPI clock specification it states that the minimum SPI clock period for the ADS8353 is 50ns and it requires a minimum of 49 clock pulses between samples (50ns x 49 = 2.45us or 408ksps). The stated acquisition time of 730ns which is supposed to correspond approx to 16 clock cycles also agrees with the 50ns clock period. So is this part capable of 600ksps (SPICLK period of 29.4ns), or only 408ksps (SPICLK period of 50ns)?
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ADS1298: not getting correct output
Part Number: ADS1298
I had designed an EMG amplifier using ADS1298. I am having certain issues with the output. When measuring an internally generated test signal I am getting a square wave. When I am applying a sine wave signal between 1N and 1P and the gain setting is kept at 1, Electrode is normal operation, channel input is normal electrode, the shape of the sine wave is not correct.
In order to further check the hardware, I simply connected the 1N and 1P pins in the following patterns and i got the output
1P not connected(NC), 1N gnd, output 0V
1P NC, 1N 3.3V, output 1.2V
1P gnd, 1N NC, output 2.4V
1P 3.3V, 1N NC, output 1.2V
The schematic of the diagram, input waveform and the output waveform obtained are attached along with
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DDC112: Can a capacitance out of 12.5pF~250pF range be used for the external cap?
Part Number: DDC112
Hello guys,
One of my customers is considering using DDC112 for their new products.
They have a few questions as the follows. Could you please give me your replies?
Q. When RANGE0 is selected (RANGE1/2/3 terminal = ALL"L" level) , DDC112 is into the external capacitor mode.
In case of this mode, TABLE 1 on page 9 of the device datasheet (SBAS085B) recommends to use a 12.5pF~250pF capacitor as a typical for the eternal cap.
Can a capacitance out of of the range be used for the external cap?
What is happen when the capacitance is used?
Do you have any Min/Max capacitonce value for the external?
. Your reply would be much appreciated.
Best regards,
Kazuya.
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ADC3444: Maximum current through internal protection diodes on Analog Differential input
Part Number: ADC3444
Dear Forum members,
Could you please comment on the following?
From the datasheet: SBAS670B – JULY 2014 – REVISED APRIL 2017
Whilst keeping note (1) above in mind.
Assuming AVDD = 1.8V the maximum input voltage should be no more than 2.1V.
If the current into these pins could be limited in order to protect the input clamping diodes could the voltage be extended to 2.5V and if so what is the maximum current.
The typical duration of the over voltage will be <5% duty cycle.
Thank you
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ADS8166: ADS8166 Input offset error match
Part Number: ADS8166
Dear Colleague,
In ADS8166 datasheet, I find Input offset error match and Input offset error, what is the differences?
Thanks a lot!
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TSW14J56EVM: Customizable sample rate and CAD file availability
Part Number: TSW14J56EVM
In the GUI, why is the required sample rate a multiple of 256 and is there a way to change this? Also, does TI have the CAD files (step, igis, etc.) for the board available?
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sigma-delta demodulator
hi,
is correct to use a LPF to extract analog data from the output digital stream of a sigma-delta ADC?
if yes, any guideline on how to implement it is more than welcome
thanks a lot in advance
KR
Vincenzo
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DAC7554: REFIN > VDD
Part Number: DAC7554
Can DAC7554 be powered with VDD = 3.3V, but REFIN = 5V?
I think REFIN needs to be less than VDD for typical operation since the output buffer is powered by VDD.
However, if the DAC input was restricted such that the output voltage would never be programmed above VDD, is this acceptable?
Or maybe there are other internal paths to be concerned about such as ESD diodes between REFIN and VDD that would conduct under this condition?
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ADC128S102QML-SP: ADC128S102QML-SP
Part Number: ADC128S102QML-SP
What is the equation to determine the output of the ADC when the input IN0 =Vin, VD equals Vs, VA=Va and the sampling rate is 100ms? Please note I need to include all Errors over temperature to support a WCA.
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ADS1220: settings to eliminate the error vs ambient temperature?
Part Number: ADS1220
We’re testing the ADS1220 circuit with a 100 ohm test resistor, which simulates a platinum RTD probe. In our circuit, this corresponds to an indicated temperature of 0 °C.
With the resistance outside the test chamber (to keep the value constant), we change the ambient temperature of the ADS1220 circuit, with the following results:
When the ambient temperature is between 22 °C and 40 °C, the indicated temperature remains 0 °C, as expected.
However, at – 30 °C ambient, the indication is -0.3 °C instead of 0 °C.
We’re using the ADS1220 in the 4-wire RTD circuit configuration described in the datasheet on Page 56 (ADS1220 SBAS501C). Rref = 500 ohms, ± 0.2 ppm / °C. In the test, we took care to emulate the probe we use in the field (proper shielding, etc). Our circuit also has the TPS22810, to ensure the power-on voltage ramp rate meets ADS1220 requirements.
What settings should we examine to eliminate the error vs ambient temperature?
Thanks
Viktorija
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ADS54J66: Can I configure this EVM to DC coupled
Part Number: ADS54J66
Hi there,
I've also got an ADS54J66 ADC EVM. Can I configure this EVM to DC coupled mode (eg by removing the input transformers)? If it is possible please let me know how to modify the EVM.
Best wishes
Kelly
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ADS1232: ADS1232 offset failure during power on
Part Number: ADS1232
Hello,
we have a big problem with the use of the ADS1232. During the development, everything seemed to be going fine. Now we started with the zero series of 2000PCBs. And we were running into a Problem. Nearly 20% of the PCBs seems to have a Problem with the ADS1232.
After power on, the ADS1232 sometimes generates an additional Offset. This Offset will stay until we shut down the device completely. For one Device we recoginzed three different Outputs for the same Input Signal (Load). The following three figures Shows the Signal DOUT for a unloaded scale. The only differentc is, set the scale was disconnect from power inbetween.
Do you have any ideas what may cause this failure?
I would be very happy about a quick response, because we are curretly running out of time in this project.
To simplify the troubleshooting, I have attached the schematic of the analog part:
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