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DAC38J84EVM: DAC has no output, even Tx works and GUI shows no alarms

July 11, 2019, 3:26 pm
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Part Number: DAC38J84EVM

I'm using Xilinx ZCU102 board to transmit data through JESD204 to DAC38J84EVM.

My settings:

Using DAC38J84EVM onboard LMK chip to generate Core Clock and SysRef for both DAC and FPGA.

LMFK: 4,4,2,10;             FPGA clock: 184.32MHz;          SerDes Line Rate: 7.3728MHz;            interpolation: 4;

I just use the default setting in the Quick Start page, and click the button 1 Program directly without configuring any other parameters in the DAC GUI. My FPGA JESD Tx core is configured accordingly.(I think I set those registers correctly)

My status is DAC has no output. FPGA after received asserted SYNC from DAC, start to send ILA sequence and followed by data transmission. As following figure shows, the Tx seems works fine so far.

As for DAC part, my Alarms and Errors Page shows everything goes well(I'm only using LANE 0 -3) .

But I still could not get any output. I've shorted the TXENABLE jumper. Does anyone know where I can debug from? Are there any potential registers in the DAC GUI I should set separately?  Please help, any info or intuition will be appreciated.

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ADS1261EVM: Reprogramming the on board processor

July 11, 2019, 4:53 pm
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Part Number: ADS1261EVM

Hi Team,

Is it possible to reprogram the TM4C19x processor on the ADS1261EVM to do digital control and filtering for a control loop?

Thanks,

Matt

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ADS131E08: Reference data for voltage step

July 11, 2019, 6:01 pm
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Part Number: ADS131E08

Hi Team, 

I got a question from my customer with regards to the ADS131E0x family. Below is their question:

We understand from the calculation, the least possible ADC input voltage that ADC can convert for the configuration of 24 bit mode, voltage reference is  +/-2.5V (to provide full scale of 5V) will be around 0.2uV..

Which means if the input step voltage is X*0.2uV the ADC conversion step is Y*1 bits.

The question is, Do you have any reference data from your experience what is the best ‘practical’ voltage step is a wise consideration to ensure the signal is well above the SNR and ADC conversion is absolute. Here  practical means to overcome uncertain system noise like thermal, aperture, external factors etc.  Of course this ‘practical’ step will impact the overall system accuracy, let’s keep it out for time being.

Is it like voltage  in step of ‘500uV or 1mV’ or any ‘lesser’ you would prefer from your field experiences?.

Any way it shall be tested, but prior to that we need this data for simulation analysis.

THanks! 

Best Regards,

Alfred

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ADC12DJ5200RF: ADC and Track-Hold Amplifier Technology

July 11, 2019, 7:03 pm
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Part Number: ADC12DJ5200RF

Dear Experts,

Pl. help me to find answer below question.

ADC related:

1. What is technology which is helping to increase sampling speed in GHz rate compared to earlier days' MHz rate?

2. What is hindrance in ADC Technology/Processes so that sampling cannot be done beyond 8GHz Analog RF Signal  (for example, 12DJ5200RF RF ADC TI) ?

Track-Hold Amplifier related:

As you are aware that Track-and-Hold Amplifier like HMC661 (Analog Devices) has drastically extended analog bandwidth of GHz ADC upto 18GHz . My queries are 
3. What is basic difference between existing Sample-and-Hold(SnH) vs newly introduced Track-and-Hold(TnH)? Any advantage of newly introduced TnH over SnH?
4. Earlier days, Sample-and-Hold was part of ADC technology and kept inside ADC. Why few TnH technology cannot be combined with ADC so that it becomes part of ADC and samples upto 20GHz, say?

Best Regards,

Sounak.

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ADS7142: is it normal to get a short time pulse on Autonomous mode?

July 11, 2019, 7:47 pm
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Part Number: ADS7142

Dear TI Experts,

My customer is debugging ADS7142, it works well on Manual Mode, however, when it works on Autonomous mode, after set "Start sequence", there will be a short time pulse on the input pin(AINP/AIN0), one-channel, single-ended,even the input signal is 0V. If the DWC is EN, this short time signal wiil trigger the alert then MCU will read this higer ADC value. Is this normal? Could you kindly give some advices about this short time pulse ? Thanks a lot.

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RTOS / AFE4420EVM：AFE4420EVM Soure code

July 11, 2019, 8:34 pm
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Part Number: AFE4420EVM

Tool/software: TI-RTOS

Dear 

we bought it AFE4420EVM we need to deveolp now , could you can provide source code for us , thanks 

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ADS131A04: Multiple Device Configuration Using Asynchronous Interrupt Mode

July 11, 2019, 11:30 pm
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Part Number: ADS131A04

Hi

i have used ADS131a04 with Arduino  in Asynchronous interrupt mode and it works fine for me. To get 8 channel data I used 1st device in Asynchronous mode and 2nd device in Synchronous slave mode as shown in fig 96. with same external clock.

At first I initialize 1st device and then its done pin get low then i send RESET command. the response of RESET command is 0xFF04 but for next NULL command it shows 0xFFFF. can you please tell me how I can initialize 2nd device to get 8  channel .

Thanks 

Manjeet Singh

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DAC8411: Vcc=5V with 3.3V SPI interface MCU

July 11, 2019, 11:51 pm
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Part Number: DAC8411

Hi,

Our customer is considering using DAC8411 @ Vcc = 5V with a 3.3V MCU. But in DS SPEC it seems impossible.
Is it really not possible without level shift?
In general, 3.3V input should be acceptable even with 5V supply.




Best regards,
Hiroshi

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Linux/AFE4404: Dicrotic Notch

July 12, 2019, 12:17 am
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Part Number: AFE4404

Tool/software: Linux

Hi!
Can you tell me why the measurement data is mirrored compared to real data?
Dicrotic Notch is on the right in real data, but Dicrotic Notch is on the left in afe4404 measurement data.

Thank you in advance for your answer!

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DAC8741H: FF/PA circuit design

July 12, 2019, 1:53 am
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Part Number: DAC8741H

Hi team,

Customer is evaluating DAC8741H. Some questions need to check with you.

1. For the FF/PA circuit shown in Figure 2 of application note sbaa367 (http://www.ti.com/lit/an/sbaa367/sbaa367.pdf ), do we have example circuit with specific component values?

2. Do we have circuit which could be compatible for HART, FF and PA?

Thanks.

Robin

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DAC38RF80: clarification on GPI and GPO signal for CMOS SYNC0&1 signal

July 12, 2019, 1:58 am
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Part Number: DAC38RF80

Hi TI,

We are using DAC38RF80 in our design.

We got confused with the description of GPI0,GPI1,GPO0 and GPIO1 pins.

Pin name and number is different in Pin Diagram and pin description table for DAC38RF80.

 

 

 

Pin Diagram of DAC38RF80 and DAC38RF83 is same for GPI/GPO signals but the description of GPI/GPO signals in pin description table of DAC38RF80 and DAC38RF83 is different.

Please tell us which pin name and number we should use for CMOS SYNC0&1, and which pin name and number should be grounded for GPI/GPO of DAC38RF80.

Thanks,

Lalit

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DAC38RF80: single ended output from divided clock output differential pins CLKTX+ (A7) & CLKTX-(A6)

July 12, 2019, 2:40 am
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Part Number: DAC38RF80

Hi TI,

We are using DAC38RF80 in our design.

We want to use the differential clock output signal CLKTX+ and CLKTX- in single ended mode.

Please suggest us how to do the connection of CLKTX+ and CLKTX- in schematic so that we can use this divided clock output from DAC38RF80 in single ended mode.

Thanks,

Lalit 

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ADS1261: Input common mode voltage

July 12, 2019, 3:18 am
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Part Number: ADS1261

Hi, I'm looking to use the ADS1261 but I just want to firstly check what the common mode voltage on the inputs is?

I'm measuring current through a shunt resistor, but the rail is at 3V3 while Vref will be 2V5 - is this OK?

Thanks,

Elton

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VSP5610: Need a Complete Design Document and Support.

July 12, 2019, 5:03 am
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Part Number: VSP5610

Hi, We would like to use VSP5610 for taking image data from a CCD Sensor and interface to FPGA. I have downloaded the datasheet and it doesn't have any Interfacing details and Register details and Output fetching details.

So I request a Complete Design Guide for VSP5610. Please help.

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ADC12DJ3200: Single Edge Sampling with a Single Channel Signal

July 12, 2019, 7:46 am
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Part Number: ADC12DJ3200

Hello,

Is it possible to do a single edged sample with a single channel signal, or is that only available with a differential signal? 

Thanks

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ADS8555: DSP Selection for High-Speed Data Collection

July 12, 2019, 8:46 am
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Part Number: ADS8555

Is there a suggested DSP device for reading from the ADS8555 at maximum speed?  I am attempting to collect data at 500ksps and store it on a uSD card. 

I have been trying to read the AtoD using the digital pins on a Raspberry Pi 3B for parallel communication.  With this method I have been able to collect data at about 300ksps, but this hasn't been very reliable.  I believe this is because I cannot control the timing of the digital IO pins precisely enough with the Pi, and I have therefore begun looking into DSPs that I could use. 

In the design document: http://www.ti.com/lit/an/slaa554/slaa554.pdf I saw that a TMS320F28335 was being used to read from the converter, but the conversion rate used was only 2.4ksps, and looking at the clock speed of that device I don't expect that it could collect data at 500ksps.

Is there a specific DSP or family of DSPs that is recommended for reading the ADS8555 at a rate of at least 500ksps.  Ideally the device could interface with either a uSD card for direct storage or with another processor that could handle the storage.

Thank you,

Jonathan Yoder

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ADS1259: Pin termination

July 12, 2019, 10:36 am
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Part Number: ADS1259

In the data sheet for the ADS1259 it says the SYNOUT pin is an output pin but when in power-down mode it is an input pin.  I'm not using the SYNOUT output and I don't intended to use the power-down feature.  For EMC considerations, would it be advisable to terminate the SYNOUT pin with a 1M resistor to ground?   In addition, I'm not intending to use the RST/PWDN pin.  Should this pin be pulled high with a 10K resistor?  Thank you. 

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ADC3444: is it necessary lvda adc DCLK_p/n to a fpga dedicated clock input pins ???

July 12, 2019, 12:10 pm
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Part Number: ADC3444

Hi everyone, 

Please help me with this question: 

I got a customized board using an lvds ADC adc3444 and Xilinx 7 serial. I found the  DCLK_p/n and FCLK_p/n are not connected to MRCC or SRCC, instead, to common lvds pairs. 

1) Isn't it necessary lvda adc DCLK_p/n to a clock dedicated pairs, such as MRCC or SRCC??? 

 

PS: My previous understanding is that 'Connect the bit clock DCLK_p/n to an MRCC differential clock input. I did read a doc saying: 

" For an ADC with serial LVDS output implementation, half of an IO-bank can handle all connections from
the ADC:
• Connect the bit clock DCLK_p/n to an MRCC differential clock input.
• Connect the frame clock FCLK_p/n to the neighbor SRCC differential clock input.

"

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ADS131A04: ADS131A04EVM

July 12, 2019, 12:42 pm
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Part Number: ADS131A04

Good day  Everyone please i am unable to see the save header option on my EVM software as directed in the software user manual.

attached below is the screen shot. Tye first image shows the image from the user manual whle the second image shows the image from my software please how do i get this option opened .

Thanks

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ADS1293: SPI communication with Master device, no output from SDO.

July 12, 2019, 4:23 pm
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Part Number: ADS1293

Hi everyone!

I'm trying to use an nrf52 board as the master to initially read one of the registers on the ADS1293. I've gotten everything to work fine using an arduino but can't get it to work with the nrf board. The problem is that nothing gets returned through the SDO/MISO wire. The code I have for the arduino is basically this:

void setup() {
  // put your setup code here, to run once:
  Serial.begin(115200);
  Serial.println("Starting SPI\n");
  SPI.begin();
  SPI.setClockDivider(SPI_CLOCK_DIV2); 
  SPI.setBitOrder(MSBFIRST);
  SPI.setDataMode(SPI_MODE2);
}

void loop() {
  byte data;
  digitalWrite(53, LOW);
  byte reg = 0x00;
  reg |= 0x80;
  SPI.transfer(reg);
  data = SPI.transfer(0);
  digitalWrite(53, HIGH);
  Serial.println("we got:");
  Serial.println(data,HEX);
}

 And for the NRF52:

#define SPI_INSTANCE   0

static uint8_t tx[2];
static uint8_t rx[2];

static const nrfx_spim_t m_spi_master_0 = NRFX_SPIM_INSTANCE(SPI_INSTANCE);

void ADS_init( void )
{
    nrfx_spim_config_t const spi_config =
    {
        .sck_pin        = 4,
        .mosi_pin       = 22,
        .miso_pin       = 23,
        .ss_pin         = 3,
        .irq_priority   = APP_IRQ_PRIORITY_LOW,
        .orc            = 0xFF,
        .frequency      = NRF_SPIM_FREQ_4M,
        .mode           = NRF_SPIM_MODE_2,
        .bit_order      = NRF_SPIM_BIT_ORDER_MSB_FIRST, 
    };
    ret_code_t err_code = nrfx_spim_init(&m_spi_master_0, &spi_config, NULL, NULL);
    SEGGER_RTT_printf(0, nrf_strerror_get(err_code));
     
}

uint8_t Read_reg(uint8_t addr)
{ 

  tx[0] = addr | ADS1293_READ_BIT; 
  tx[1] = 0x00; 
  nrfx_spim_xfer_desc_t xfer_desc = NRFX_SPIM_XFER_TRX(tx, 2, rx, 2);
  ret_code_t err_code = nrfx_spim_xfer(&m_spi_master_0, &xfer_desc, 0);
  SEGGER_RTT_printf(0, nrf_strerror_get(err_code));
  return rx[1];

}

Since nothing return to the MISO the excution basically gets stuck. I hope this is the right place to post.
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